Nov 28, 2020  
2020-2021 Undergraduate Catalog 
    
2020-2021 Undergraduate Catalog
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CPE 3020:VHDL Design with FPGAs

3 Class Hours 3 Laboratory Hours 4 Credit Hours
Prerequisite: EE 2501  and Engineering Standing  
This course will explore the design and development of synchronous and asynchronous machines using VHDL. VHDL is an industry standard design language used to create complex embedded digital systems in programmable devices such as FPGAs and CPLDs. This course will explore design simulation, synthesis, and timing analysis. Physical configurations for FPGAs and CPLDs will also be explored.



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